IC 4017 Decade Counter Pin Outs Explored in Detail

IC 4017  Decade Counter Pin Outs Explored in Detail
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We have already studied about the 8085 pin description and the 4060 chip in our discussions related to Integrated Circuit chips. We also learnt how to decouple a logic circuit. In this article we will talk about 4017 pin outs in detail.

The IC 4017 is a versatile IC of the CMOS family which has got wide range of applications. Internally it consists of a 10 stage decade counter/divider. When a clock pulse is applied to it externally, its outputs become logic ‘hi’ and ‘lo’ sequentially (one after the other). It has got numerous applications, for example in circuits where sequential switching are required and also in decorative ornamental lighting, where the lights are switched on and off sequentially giving it a ‘running’ effect.

Pin Configurations of IC 4017

As can be from the diagram above, the IC 4017 is a 16 pin dual in line package IC. Pin 1 can be identified from a small depressed circle at the extreme left corner of the IC, or simply one can always remember, the printed side of the IC facing towards you, the pin beginning from the left side of the semi circle notch of every IC is pin 1.

Pin configurations of this IC are as follows:

  • Pin 1 to pin 7 and pins 8, 9, 10 are all the outputs of the IC.
  • Pin 16 is for the positive supply and pin 8 is ground.
  • Pin 15 is the reset point of the IC. A logic ‘0’ to this pin (or by connecting it to the ground), gives a green signal to the IC, so that it can function. A logic ‘1’ or a positive supply here will bring its proceedings to a stand still and will reset it. At this position pin 3 of the IC4017 stays at logic ‘1’ where as all other outputs are logic ‘lo’.
  • Pin 14 is the clock input of the IC 4017. An external clock signal to this point will make a logic ‘1’ to proceed sequentially, beginning from pin 3 and ending at pin 11.
  • The cycle is repeated as long as the clock persists at pin 14. The period of time each output stays logic ‘1’ will depend on the time period of the positive peaks of the clock signal. With the rising edge of every clock pulse, the ‘logic 1’ will shift from one output to the other serially.
  • Pin 13 is the clock enable point. A logic ‘1’ to this pin will stop the IC 4017 from proceeding and its output will freeze at that instant at the particular output. Even if the clock signal at pin 14 is ON, the output cant shift as long as pin 13 is held at logic'1’, therefore this point should be grounded. On the contrary if pin 14 is held at logic'1’ and clock signal is applied at pin 1, every falling edge of the pulse will make the outputs to change state sequentially.