At first instance, the involvement of four ICs may appear a bit complicated, but a deep inspection will prove that completely wrong.
From the given circuit diagram we see that the entire circuit basically comprises two identical stages with identical parameters. The smart integration of these two discrete identical stages makes it possible for the user to have separate and independent access to the ON time and the OFF time of the circuit.
Each stage is primarily made up of two highly versatile CMOS ICs 4060 and 4017. The first one is an oscillator/counter and the latter is a ten stage binary ripple counter/divider IC.
The IC 4060 just requires R1, R3, C1 and VR1 to be wired with it as shown and immediately starts oscillating once powered. Here VR1 and C1 determine the rate of oscillations. The relevant output from this IC initiates with a logic zero and alternately goes hi and lo at a rate depending upon the setting of VR1.
This output is fed to the clock input of IC 4017 which responds to the input pulses so that a logic high status begins shifting at its pin-outs in the sequence of 3-2-4-7-10-1-5-6-9-11.
Since here the output of IC2 is taken from its pin #1, which is placed fifth in the order means it will become high exactly after IC1 produces five logic high pulses. Remember these pulses are separated equally with logic low pulses also, therefore five logic high pulses, each having a time period of say 1 minute will be separated/accompanied by an equal number of logic lo pulses having same durations, making the total time duration of these pulses equal to 10 minutes.
In this way the length or the time delay of the pulses can be increased or decreased as desired just by adjusting VR1 for this stage.
Now once the output (pin #1 or as selected) of IC2 goes high, it sends a logic high status to pin #11 of IC1 via D1 “freezing" its counting process and also itself, so that its output gets locked at the generated logic high level.
The above pin-out also reaches the base of T2 via LED1, instantly activating both of them and resetting pin #12 of IC3 into action.
IC3 now begins counting and feeding IC4 until its output also goes high in the same process as explained for the IC1 and IC2, when ultimately T2 energizes the relay and the load or an alarm.
Summarizing the above functioning we find that the fixing of VR1 makes it possible to set the initialization of the countdown, i.e. suppose if in the watch its 9 o'clock and you want the timer to start its actual countdown after five hours or at about 2 o’clock, then you just set VR1 to produce a time delay of five hours. Now you will need also to set VR2 appropriately so that after five hours once this section gets triggered it proceeds with the countdown to finally activate the connected output load.
It will be interesting for the readers to note that the present design offers numerous different ways of optimizing the timing outputs. Although only three terminals are shown for S1 and S2, you may select any other output from the remaining pin-outs of the ICs 4060. The same is true for the ICs 4017 (in the diagram pin-out #1 has been selected). Of course VR1 and VR2 are also present as the standard time fixing components.
Thus we see that this programmable timer counter circuit is very flexible and also allows you to store two distinct time settings independently. Moreover the whole set up can be built using ordinary and cheap analogue components.