Memory Write Machine cycle
This cycle as the name specifies is used for sending data from the registers of the microprocessor to the memory or any other I/O devices.
A simple example for such an instruction is MOV M, A
When the above instruction is executed the contents of the accumulator is moved to the specified memory location. For this operation to take place, we need two machine cycles. One is the Opcode fetch cycle and the second to transfer the contents of memory to the accumulator.
This is the Opcode fetch cycle where the microprocessor places the 16 bit address on the higher order address bus (A8-A15) and lower order address and data multiplexed bus (AD0-AD7). The ALE goes high to latch the AD0-AD7 bus and during the middle of T1 state it goes low, so that the complete 16 bit address is available.
Now what the microprocessor has to do with this address and data? Should it write the data or read it? How will the microprocessor recognize about what operation should be performed?
The microprocessor can recognize it using the status signal IO/M’, S0 and S1. For memory write cycle the values of status signals should be
This status information is always maintained throughout the machine cycle.
At the beginning of this state WR’ goes low (as it is a memory write cycle). Whereas in read cycle the RD’ goes low to enable memory. During this state the contents of the register is placed on the Data bus.
The data which was placed on the data bus in the previous state is now transferred to the specific memory location. In the middle of this state the WR’ goes high and disables the memory.
Thus the data is transferred from the accumulator to specific memory location. This is the memory write machine cycle.
For better understanding the diagram of memory write machine cycle is shown below.